1. Field of the Invention
The invention relates to a process for the display of different grey levels and to a system for performing this process.
The display system according to the invention is more particularly applicable to microtip screens.
In the present description the term "grey tone" covers tints.
2. Brief Description of Related Prior Art
In the display field, the standard addressing processes have been described by T. Leroux, A. Ghis, R. Meyer and D. Sarrasin in an article entitled "Microtip Display Addressing" (SID 91 Digest pp.437-439). This article makes a distinction between two addressing types:
an analog addressing consisting of sampling an analog source signal (e.g. of the video type); and
a pulse width modulation (PWM) addressing based on the time division switching of the column voltage.
The analog solution can be satisfactory for television applications. However, the existing technology for matrix screen control circuits only permits sampling levels of approximately 5 MHz, which is inadequate for data processing applications. For example, the "data" clock for a VGA screen (existing screen of standard size) is approximately 25 MHz. In addition, for data processing there is a digital data source. Therefore an analog control mode requires a supplementary stage of transforming the source signal by means of a digital--analog converter.
The digital solution can be obtained with the aid of several known processes.
A time modulation of the pulse width modulation (PWM type) consists, with a circuit able to switch at the output two voltage levels (making it possible to select the ON and OFF states, of modulating the duration of the ON state of the column in question during the row selection. This type of addressing functions well for the display of a small number of grey tones, e.g. 16. However, for the correct transmission of a grey tint, the selection times must be long compared with the rise times of the signals. However, for a VGA screen (640 columns, 480 rows) scanned at the field or frame frequency of 70 Hz, the row selection time is max. 1/(70.times.480) approximately equal to 30 .mu.s. For 16 grey tones, the smallest selection period is therefore 30 .mu.s/16 which is approximately equal to 2 .mu.s and for 256 tones: 30 .mu.s/256 which is approximately equal to 120 ns. The order of magnitude of the rise times, linked with the output impedance of the column circuits and the capacity of the column of the screen, is one hundred to a few hundred nanoseconds. Thus, this method can be satisfactory for 16 grey tones, but is certainly not for 256.
A time modulation of the frame rate control (FRC) type consists of performing several scans of the image by successively allocating ON or OFF states to the same pixels, the eye serving as the integrator. This modulation is also limited with regards to the number of grey tones, because the multiple addressing of the same image element on the one hand leads to high frequencies at the level of the data flow on entering the circuits and on the other to excessively short selection periods on the outputs. In practice, there are screens displaying 32 grey tones with this method. However, these are liquid crystal screens of the STN (super twisted nematic or multiplexed LCD type), whose response times of approximately 200 to 300 ms make it possible to completely renew the information of a pixel with times exceeding that of the persistence of vision. Such a method is illustrated in European patent applications 384 403-A2 of SEIKO and 364 307-A2 of COMPAQ.
A method using multilevel circuits consists of using circuits able to switch N different voltage levels (in practice N=8 or N=16). The analog output multiplexer ensuring the switching of relatively high voltages consequently has a relatively large "silicon" size. Moreover, for each output there is a multiplexer. It is therefore scarcely possible to envisage more than 16 switchable channels.
Such multilevel circuits can be associated with the FRC method, as described in the article by H. Mario, T. Furukashi and T. Tanaka entitled "Multicolor Display Control Method for TFT-LCD" (SID 91 Digest pp.547-550). It is a question of using multilevel circuits (analog multiplexers), e.g. eight such circuits, and performing two scans of the screen (frame 1 and frame 2). Frame 1 is representative of the low orders and is obtained by using a first set of eight voltages applied to the multiplexers, whereas the second represents the high orders and is obtained by means of a second set of eight voltages different from the first voltages.
FIG. 1 illustrates this method by giving a mimic diagram example for sixty four grey levels with two sets of eight different voltage levels.
In FIG. 1 a source 10 of digital data to be displayed supplies digital data to three logic multiplexers 11 having two inputs and one output, the bits of order 1, 2 and 4 being respectively connected to a first input of said multiplexers 11, whilst the bits of order 8, 16 and 32 are respectively connected to the second input of said multiplexers 11.
The three outputs of these multiplexers are respectively connected to three data storage circuits 12 comprising shift registers associated with storage registers or latches.
A generator 15 supplies a first set of eight voltages V.sub.0a to V.sub.7a and a second set of eight voltages V.sub.pb to V.sub.b, which are connected pairwise to the inputs of eight "high" voltage multiplexers 14 having two inputs and one output.
A controller 16 connected to the data source 10 supplies a control signal ST, which is supplied to each of the logic multiplexers 11 and to each of the "high" multiplexers 14.
A column control circuit 13 of the screen 17 receives on the one hand the outputs of the circuits 12 and on the other those of the "high" voltage multiplexers 14. This control circuit 13 is formed from eight analog multiplexers having eight inputs and one output.
FIG. 1 does not show the row control circuit, which can be of a conventional nature, e.g. using shift registers making it possible to successively select one by one the rows of the screen.
The data source comprises a memory for storing the data corresponding to a screen page. The signal ST, connected to all the multiplexers 11 and 14, with two inputs and an output, is a frame parity multiplexer selection signal.
Such a method requires sixteen voltage values for 64 grey levels (and twenty four if it is wished to apply it to two hundred and fifty six levels on three frames) with relatively high precision levels.
For example, for sixty four levels (with data on six bits), we have the orders: EQU 2.sup.0 =1 2.sup.1 =2 2.sup.2 =4 2.sup.3 =8 2.sup.4 =16 2.sup.5 =32
the first frame having to represent the orders 1, 2 and 4 of said data and the second the orders 8, 16 and 32, so that there are the following luminance or brightness levels on the screen 17:
______________________________________ L(V.sub.0a) = 0 L(V.sub.0b) = 0 L(V.sub.1a) = 1 .times. L(V.sub.1a) L(V.sub.1b) = 8 .times. L(V.sub.1a) L(V.sub.2a) = 2 .times. L(V.sub.1a) L(V.sub.1b) = 16 .times. L(V.sub.1a) L(V.sub.3a) = 3 .times. L(V.sub.1a) L(V.sub.1b) = 24 .times. L(V.sub.1a) L(V.sub.4a) = 4 .times. L(V.sub.1a) L(V.sub.1b) = 32 .times. L(V.sub.1a) L(V.sub.5a) = 5 .times. L(V.sub.1a) L(V.sub.1b) = 40 .times. L(V.sub.1a) L(V.sub.6a) = 6 .times. L(V.sub.1a) L(V.sub.1b) = 48 .times. L(V.sub.1a) L(V.sub.7a) = 7 .times. L(V.sub.1a) L(V.sub.1b) = 56 .times. L(V.sub.1a) ______________________________________
Such a method leads to a reduction of the contrast of the screen, because half the effective addressing time is devoted to the display of a low order level. For example, for a display of the white with two frames for sixty four grey levels, we obtain:
for frame 1:L(V.sub.a)=7.times.L(V.sub.1)
for frame 2:L(V.sub.b)=56.times.L(V.sub.1).
Therefore the overall efficiency is only 9/16 which, with two subframes, gives a luminance loss for the white of approximately 40%.